BIG BLUE has announced the first working static random access memory (SRAM) cell for the 22 nanometer (nm) technology node. The new SRAM utilises a conventional six-transistor blueprint and has an area of 0.1um2 – a measurement that reportedly shatters previous SRAM scaling barriers.

An SRAM chip is typically condensed by shrinking its basic building block – often referred to as a cell. However, IBM researchers managed to significantly optimise the conventional SRAM design by employing high-NA immersion lithography to print the aggressive pattern dimensions and densities.

According to Dr TC Chen of IBM, the recent SRAM development is, “a critical achievement in the pursuit to continually drive miniaturisation in microelectronics”.

It should be noted that a single nanometer measures one one-billionth of a meter and is approximately 80,000 times smaller than the width of a human hair.

L'Inq
IBM